Looking at those project accounts today, I often ask a simple question:
What if today's AI had been part of those workflows back then?
I believe it could have reduced nearly 90% of the low-value repetitive work tied to those projects, while maintaining accuracy approaching 99.9999% for structured, rule-driven tasks. In financial terms, that translates into lower project burn rates, faster development cycles, and quicker capitalization of R&D assets.
Notice that I said repetitive workload, not engineering judgement.
IC development has never been just about circuit diagrams. Engineers spend large portions of their time searching documentation, checking design rules, generating reports, comparing revisions, validating parameters, and ensuring compliance with manufacturing constraints. From an accounting perspective, these are cost-bearing activities with predictable inputs-exactly the structured tasks where AI can deliver measurable return.
Fast forward to today.
The AI conversation has shifted from "Which model is the smartest?" to "How should AI be integrated so that it protects margins and improves project predictability?"
From a financial operations perspective, the future of semiconductor engineering is not about removing engineers from the payroll.
It is about reallocating expensive engineering capacity toward high-value problem-solving while AI handles repetitive, deterministic processes.
This is also why I pay close attention to AI infrastructure and architecture from an asset-management viewpoint. The objective is not simply to deploy the largest language model, but to build systems that know when AI should be used-and when traditional software, parsers, rules engines, or deterministic workflows are the more cost-effective choice.
In semiconductor design, every unnecessary verification cycle adds to project cost and delays revenue recognition.
Every design respin consumes budget, inventory, and working capital.
Every engineering hour saved shortens the path from concept to silicon and improves return on R&D investment.
That is why I view AI as an essential operational asset for IC and semiconductor teams. Its value is not headcount reduction; it is enabling engineers to focus on innovation instead of repetitive execution, while finance teams see improved cost control and project visibility.
Having reviewed engineering project finances before today's AI era, I appreciate how transformative this technology can be when applied with the right architecture and governance.
The next generation of IC design will not be powered by smarter AI alone.
It will be powered by smarter, more cost-efficient engineering workflows.
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I have watched parsers, rules engines, or deterministic go wrong in practice. Good to see it written down.
Useful. We are dealing with rule-driven tasks right now.
The part on whether the work is MEMS is the bit I keep re-reading.
Saya baca dua kali. 90% yang paling melekat.
Honestly, documentation updates surprised me.
Simpan dulu, terutama karena 90%. Sepertinya harus saya baca ulang.
checking design rules, generating reports is the part I would forward to my boss.
I do not fully buy deterministic processes.This yet, but it is a fair argument.
Sent this to two people already. comparing revisions, validating parameters is why.
Worth reading for engineers spend large portions alone.
This is where IC layout, or system verification finally makes sense.
The framing around software licences, foundry fees is better than I expected.
Not sure I agree with every unnecessary verification cycle adds, but teh rest holds up.
Still thinking about faster development cycles, and quicker.
You can tell the writer actually worked on revised schedules, additional verification.
Angka tentang 90% lebih masuk akal daripada kebanyakan pos. Kena baca ulang bahagian ini.